VMM3

VMM3 prototype

Documentation:

L0 Trigger mode data format (see hit format details on page 28 in ATLAS NSW Electronics Specifications)

VMM Prototype I/O through Mezzanine - connector pinout

VMM3 Timing Diagram

Other useful Documentation:

VMM Based Readout Prototype for GEM detectors by Ed Jastrzembski (August 2022)

=useful==> ATLAS NSW Electronics Specifications, Component: VMM3a (April 23, 2018)

VMM ASIC by George Iakovidis, Brookhaven (04/06/2019)

The VMM3a User Guide by George Iakovidis (Nov 7, 2022)

VMM3a Discrimination, Charge and Time by G.Iakovidis (04/06/2019)

Change configuration file

goto $CLON_PARMS/vmm/
run command 'vmm_create_cfg_file_L0'
following menu command, read existing config vmm.txt, change settings, and write new config to the file
move symbolic link vmm.txt to the new file

Parameters which can be changed using commands

latency: before Prestart: tcpClient clondaq9 'vmmSetWindowParameters(78,4)' (latency and window size in 24ns ticks)

Running modes with TI:

   To use prototype clock: connect prototype clock output (pins 9/10 of the connector on FPGA side) to prototype CLOCK IN.
   To use TI clock: connect TI clock output (pins 39/40) to prototype CLOCK IN, set TI clock output to 41.7MHz.

 Using pulser on prototype:
   Connect prototype AUX OUT to TI trigger input (pins 31/32 if TS#5 is used).
   Connect TI Prompt Trigger Out (pins 15/16) to prototype TRIG IN.
   Select Trigger Source as 'external delayed' (1).
   Select Test Pulse Source (CKTP) as 'internal pulser' (2).
   Program the internal pulser rate.
   Program the delay between hit and trigger that matches the Latency in the VMM Configuration file.
 Description of mode:
   The internal pulser is enabled by selecting CKTP as 'internal pulser'.
   The Test Pulse promptly generates hits in the channels selected in the VMM Configuration file and is also driven off board on AUX OUT.
   The L1 Accept from the TI is the TRIG IN signal which is delayed in the prototype by the programmed amount ( = Latency).
   The delayed trigger is the VMM Trigger.  (The delay may have to be set slightly less than the Latency due to the TI  IN-OUT delay.)

 Using pulser on TI:
   Connect TI Prompt Trigger Out (pins 15/16) to prototype TRIG IN.
   Select Trigger Source as 'external delayed' (1).
   Select Test Pulse Source (CKTP) as 'external trigger' (1).
   Program the delay between hit and trigger that matches the Latency in the VMM Configuration file.
   Program and start pulser on TI.
 Description of mode:
   By selecting CKTP as 'external trigger' the TRIG IN signal will generate the Test Pulse.
   The internal pulser on the prototype is not enabled.
   The Test Pulse promptly generates hits in the channels selected in the VMM Configuration file.
   TRIG IN is delayed in the prototype by the programmed amount ( = Latency) and serves as the VMM trigger.

 Detector Mode:
   Connect TI Prompt Trigger Out (pins 15/16) to prototype TRIG IN.
   Select Trigger Source as 'external' (0).
   Select Test Pulse Source (CKTP) as 'none' (0).
   Program the Latency in the VMM Configuration file to match the expected HIT - TRIGGER time difference.
 Description of mode:
   By selecting CKTP as 'none' the internal pulser is not enabled.
   The TRIG IN signal will be promptly sent as the VMM trigger.

TDC values explanation: (see VMM3 Timing Diagram above)

For the VMM Configuration file I gave you the programmed window size is 7 BC clock periods so this is the range of trigger delay values that should give you matching hits.
The leading edge of the trigger pulse matters in fixing the look back - the trigger width is not a factor.  (Note: the maximum window width is 8 - I believe to get this value you program window = 0; need to confirm this.)

Description of TDC from VMM Specification (p7):
"The time detector measures the timing using a time-to-amplitude converter (TAC),
 i.e. a voltage ramp that starts either at the threshold crossing [of hit] or at the time of the peak [of hit] and stops at a clock cycle of the BC clock."
 (See attached 2 slides.)

In the current firmware the test pulse (CKTP) that generates the hits in the channels is synchronous to BC so the 8-bit ADC measurement shows only small event-to-event variations.
In the future I can introduce an adjustable phase shift for CKTP relative to BC that would be useful to calibrate the TAC.  Calibration of the TAC may also be done with an external pulse generator injecting hits into the VMM.  

Detector pulses are of course asynchronous to BC and will show up as a distribution in time.  Since the BC period is nominally 25 ns the TAC voltage ramp should be chosen to be the smallest value (60 ns) for the best time resolution.
This is the value in your current VMM Configuration file.