JLAB VME VSCM: Difference between revisions
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CLAS12 SVT readout board, designed by JLAB Fast Electronics Group (Ben Raydo). | CLAS12 SVT readout board, designed by JLAB Fast Electronics Group (Ben Raydo). | ||
Preliminary document 1: [https://clonwiki0.jlab.org/wiki/clondocs/Docs/JLAB_VME_VSCM_TDR_May2012.pdf (pdf)] [https://clonwiki0.jlab.org/wiki/clondocs/Docs/JLAB_VME_VSCM_TDR_May2012.docx (docx)] | |||
Preliminary document 2: [https://clonwiki0.jlab.org/wiki/clondocs/Docs/JLAB_VME_VSCM_D00000-16-08-S004-VSCM_Module.pdf (pdf)] | |||
[https://clonwiki0.jlab.org/wiki/clondocs/Docs/JLAB_VME_VSCM_D00000-16-08-S004-VSCM_Module.docx (docx)] | |||
Recent manual: [https://clonwiki0.jlab.org/wiki/clondocs/Docs/JLAB_VME_VSCM_D00000-16-08-S004-VSCM_Module_2011.pdf (pdf)] | |||
'''SVT2 testsetup:''' contains VSCM board(s), SD, TI and compactflash-based CPU. To start CODA ''ssh clasrun@svt2'' and type ''svt2_start''. To kill CODA type ''svt2_exit''. Config file: ''$CLAS/parms/vscm/VSCMConfig.txt''. | |||
'''Changing code:''' ''ssh clas12run@svt2'', ''cd $CODA/src/rol'', ''make'' to recompile ''./code.s/vscm.c'' and ''make urols'' to recompile ''./rol/svt2.c'' (last file must be touched to force makefile to recompile it - bug to be fixed). | |||
'''Data format from the board:''' | |||
<nowiki><dictEntry name="SVT Hadrware Data" tag="0x0000" num="0" type="uint32"></nowiki> | |||
<nowiki><description></nowiki> | |||
0(31:27)=0x10+0x00 "BLKHDR" | 0(31:27)=0x10+0x00 "BLKHDR" | ||
0(26:22) "SLOTID" | 0(26:22) "SLOTID" | ||
Line 18: | Line 25: | ||
0(21:0) "NWORDS" | 0(21:0) "NWORDS" | ||
0(31:27)=0x10+0x02 "EVTHDR" | 0(31:27)=0x10+0x02 "EVTHDR" | ||
0(26:0) "EVENT" | |||
0(31:27)=0x10+0x03 "TRGTIME" | 0(31:27)=0x10+0x03 "TRGTIME" | ||
0(23:0) "TIMEH" | |||
1(23:0) "TIMEL" | |||
0(31:27)=0x10+0x08 "FSSREVT" | 0(31:27)=0x10+0x08 "FSSREVT" | ||
0(22:22) "HFCBID" | 0(22:22) "HFCBID" | ||
Line 30: | Line 37: | ||
0(31:27)=0x10+0x0E "DNV" | 0(31:27)=0x10+0x0E "DNV" | ||
0(31:27)=0x10+0x0F "FILLER" | 0(31:27)=0x10+0x0F "FILLER" | ||
<nowiki></description></nowiki> | |||
<nowiki></dictEntry></nowiki> | |||
Data format after ROL2: | '''Data format after ROL2:''' | ||
<nowiki><dictEntry name="SVT Raw Data" tag="0xe104" num="0" type="uint32"></nowiki> | |||
<nowiki><description></nowiki> | |||
0(31:27)=0x10+0x08 "FSSREVT" | 0(31:27)=0x10+0x08 "FSSREVT" | ||
0(22:22) "HFCBID" | 0(22:22) "HFCBID" | ||
Line 43: | Line 50: | ||
0(11:04) "LATENCY" | 0(11:04) "LATENCY" | ||
0(02:00) "ADC" | 0(02:00) "ADC" | ||
<nowiki></description></nowiki> | |||
<nowiki></dictEntry></nowiki> |
Latest revision as of 15:06, 17 April 2015
CLAS12 SVT readout board, designed by JLAB Fast Electronics Group (Ben Raydo).
Preliminary document 1: (pdf) (docx)
Preliminary document 2: (pdf) (docx)
Recent manual: (pdf)
SVT2 testsetup: contains VSCM board(s), SD, TI and compactflash-based CPU. To start CODA ssh clasrun@svt2 and type svt2_start. To kill CODA type svt2_exit. Config file: $CLAS/parms/vscm/VSCMConfig.txt.
Changing code: ssh clas12run@svt2, cd $CODA/src/rol, make to recompile ./code.s/vscm.c and make urols to recompile ./rol/svt2.c (last file must be touched to force makefile to recompile it - bug to be fixed).
Data format from the board:
<dictEntry name="SVT Hadrware Data" tag="0x0000" num="0" type="uint32"> <description> 0(31:27)=0x10+0x00 "BLKHDR" 0(26:22) "SLOTID" 0(21:11) "NEVENTS" 0(10:00) "BLOCK" 0(31:27)=0x10+0x01 "BLKTLR" 0(26:22) "SLOTID" 0(21:0) "NWORDS" 0(31:27)=0x10+0x02 "EVTHDR" 0(26:0) "EVENT" 0(31:27)=0x10+0x03 "TRGTIME" 0(23:0) "TIMEH" 1(23:0) "TIMEL" 0(31:27)=0x10+0x08 "FSSREVT" 0(22:22) "HFCBID" 0(21:19) "CHIPID" 0(18:12) "CH" 0(11:04) "BCO" 0(02:00) "ADC" 0(31:27)=0x10+0x0E "DNV" 0(31:27)=0x10+0x0F "FILLER" </description> </dictEntry>
Data format after ROL2:
<dictEntry name="SVT Raw Data" tag="0xe104" num="0" type="uint32"> <description> 0(31:27)=0x10+0x08 "FSSREVT" 0(22:22) "HFCBID" 0(21:19) "CHIPID" 0(18:12) "CH" 0(11:04) "LATENCY" 0(02:00) "ADC" </description> </dictEntry>