JLAB FADC250

Preliminary documentation:

Sep 1, 2011 registers description in V2 Programming (pdf)

Some documentation received on Sep 12, 2011 from Bryan Moffit:

V2 FPGA (pdf)

Signal Control Module (pdf)

Some documentation for V1 FADC:

V1 data format (pdf)

V1 Programming ((pdf)

firmware upgrade procedure from Bryan Moffit April 2013

1. Copy /root/linuxvme directory tree from ftof0.
   scp -r root@ftof0:linuxvme/ .

2. Copy /root/.bashrc (to set LINUXVME_* env variables)
   scp root@ftof0:.bashrc .
 
3. (re)Compile required libraries
   cd linuxvme/jvme
   make clean;make
   cd ~/linuxvme/ti
   make clean; make ARCH=Linux; make ARCH=Linux tiEMload
   cd ~/linuxvme/fadcV2
   make clean; make ARCH=Linux
   cd firmware/linux
   make firmwareGtest

4.  Update TI firmware
   cd ~/linuxvme/ti
   ./tiEMload ti8a.svf

5.  Update fADC250 firmware (all in crate)
   cd ~/linuxvme/fadcV2/firmware/linux
   ./firmwareGTest 1 ../CTRL_FPGA_V2_TOP_0x0211.mcs
   ./firmwareGTest 2 ../FADC250_V2_TOP_0x0907.mcs 

Test results - pulser with realistic shape

• FADC250 Signal: one channel - 100 events; width because of trigger jitter ?

fadc250.SB.doublepeak.pdf ( pdf)

• FADC250 Signal: one channel - one event

fadc250.SB.onepeak.pdf ( pdf)

• FADC250 Signals, offset=3300 for all channels: 16 channels - one event. Note: channel 6 - dead, channel 15 - overflow due to high offset

fadc250.SB.16ch.pdf ( pdf)

• FADC250 Signals, offset=3200 for all channels: 16 channels - one event. Note: channel 6 - dead

fadc250_16ch.10452.pdf ( pdf)

• FADC250 Baseline (Pedestal) measurements: presentation in time-line and distribution, based on about 60 hours running with 1 Hz event rate

fadc250_16ch_bl_ped.10452.pdf ( pdf)

• FADC250 Offset Calibration

fadc250_16ch_bl_slope.10453.pdf ( pdf)