JLAB VME VSCM

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Revision as of 12:18, 20 November 2012 by 129.57.76.91 (talk)
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CLAS12 SVT readout board, designed by JLAB Fast Electronics Group (Ben Raydo).

Manual:


Data format from the board:

<dictEntry name="SVT Hadrware Data" tag="0x0000" num="0" type="uint32"> <description>

           0(31:27)=0x10+0x00 "BLKHDR"
              0(26:22)        "SLOTID"
              0(21:11)        "NEVENTS"
              0(10:00)        "BLOCK"
           0(31:27)=0x10+0x01 "BLKTLR"
              0(26:22)        "SLOTID"
              0(21:0)         "NWORDS"
           0(31:27)=0x10+0x02 "EVTHDR"

0(26:0) "EVENT"

           0(31:27)=0x10+0x03 "TRGTIME"

0(23:0) "TIMEH" 1(23:0) "TIMEL"

           0(31:27)=0x10+0x08 "FSSREVT"
              0(22:22)        "HFCBID"
              0(21:19)        "CHIPID"
              0(18:12)        "CH"
              0(11:04)        "BCO"
              0(02:00)        "ADC"
           0(31:27)=0x10+0x0E "DNV"
           0(31:27)=0x10+0x0F "FILLER"

</description> </dictEntry>

Data format after ROL2:

<dictEntry name="SVT Raw Data" tag="0xe104" num="0" type="uint32"> <description>

           0(31:27)=0x10+0x08 "FSSREVT"
              0(22:22)        "HFCBID"
              0(21:19)        "CHIPID"
              0(18:12)        "CH"
              0(11:04)        "LATENCY"
              0(02:00)        "ADC"

</description> </dictEntry>