JLAB FADC250

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Revision as of 15:42, 22 September 2011 by 129.57.87.30 (talk)
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Preliminary documentation:

Sep 1, 2011 registers description in V2 Programming (pdf)

Some documentation received on Sep 12, 2011 from Bryan Moffit:

V2 FPGA (pdf)

Signal Control Module (pdf)

Some documentation for V1 FADC:

V1 data format (pdf)

V1 Programming ((pdf)


Test results

  • fadc250.SB.doublepeak.pdf

( pdf)