January 8, 2014 online meeting minutes: Difference between revisions
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Created page with "present: Sergey Boyarinov, Ben Raydo, Hovanes 1. HPS preparations * Ben presented slides about HPS trigger status {pdf}; CTP replaced with GTP, should be no problems; have 2 G..." |
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present: Sergey Boyarinov, Ben Raydo, Hovanes | present: Sergey Boyarinov, Ben Raydo, Hovanes, Chris Cuevas | ||
1. HPS preparations | 1. HPS preparations | ||
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* CTP and SSP will do cluster multiplicity in 3x3 window (was energy only) | * CTP and SSP will do cluster multiplicity in 3x3 window (was energy only) | ||
* FADC and SSP trigger info will be readout over VME bus; GTP will have Linux core aka NIOS processor | * FADC and SSP trigger info will be readout over VME bus; GTP will have Linux core aka NIOS processor and separate coda_roc there | ||
* will start DAQ assembling in the Hall in Ferbuary, probably using FC electronics, sector1 for example | |||
Revision as of 11:46, 8 January 2014
present: Sergey Boyarinov, Ben Raydo, Hovanes, Chris Cuevas
1. HPS preparations
* Ben presented slides about HPS trigger status {pdf}; CTP replaced with GTP, should be no problems; have 2 GTPs, will test in February and see if HallD GTPs can be used as spare (twice smaller FPGA), then decide on building another one or not; muon system will participate in trigger in SSP, matching muon cluster and ECAL cluster, will need another GTP; GTP-SSP connection will be 5GBps with 2 lines, 14 FADCs per crate will be better (7 on each side from switch slots); CLAS12 will do 4x2.5 on new GTP;
- FADC HallD firmware will be used as a starting point for Ben's HPS implementation; if not ready, will discuss it again in 1 month; event-by-event pedestal ???
- for verification simulated data and FADC playback mode will be used - probably a lot of work here
- FADC trigger reports every 32ns with 13bit for energy and 4ns timing resolution; integration in readout and trigger will be similar with the same pedestal to make it easy to compare trigger and readout data for verification purposes; gain matching for trigger will provide energy in MeVs; energy spectra histogram (per channel) may be provided
- CTP and SSP will do cluster multiplicity in 3x3 window (was energy only)
- FADC and SSP trigger info will be readout over VME bus; GTP will have Linux core aka NIOS processor and separate coda_roc there
- will start DAQ assembling in the Hall in Ferbuary, probably using FC electronics, sector1 for example