September 30, 2009 online meeting minutes: Difference between revisions

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* test input to be implemented
* test input to be implemented


* scalers (ungated and gated) to be tested, they resets on read; readout will be the same as JLAB FADCs (DMA readout)
* scalers (ungated and gated) to be tested, they resets on read; readout will be the same as JLAB FADCs (DMA readout); gated and ungated scalers must to be latched together - to be implemented

Revision as of 10:00, 30 September 2009

present: Sergey Boyarinov, S.P., Ben

1. Discr:

  • compensate for propagation if possible
  • test with different TDC boards and low amplitude pulse, probably triangle shape
  • investigate spikes in trigger output distributions (change input frequency etc)
  • threshold dependence is very linear for one channel, need to check channel-to-channel dependence, typical must be +-1mv (spec has +-3mv max); slope measured as 0.263, must be 0.25 (maybe scope is not calibrated good enough, Ben will check)
  • tdc output pulse width: need to have a calibration on board level to make sure it starts from zero and linear
  • trg output width will have 4ns step
  • delay for trg is 75-80ns, need as low as possible, will be 15ns in new revision with 4ns step
  • OR output works, masks works
  • test input to be implemented
  • scalers (ungated and gated) to be tested, they resets on read; readout will be the same as JLAB FADCs (DMA readout); gated and ungated scalers must to be latched together - to be implemented