October 3, 2007 online meeting minutes

present: Sergey Boyarinov, Sergey Pozdnyakov, Nerses Gevorgyan, Tanest Chinwanawich, Elliott Wolin, Benjamin Raydo, Stepan Stepanyan

DVCS Trigger System

Ben presented preliminary design of the system. It based on v1495 boards equiped with A395A and A395D cards. System uses 200MHz clock wich 4-clock data processing cycles. There is no external start, system works as pipeline. In according to Stepan time difference between hits in the same cluster is smaller then few ns, so with processing clock 50MHz we will set discriminator's output signals to about 30ns to enforce coinsidence.

Ben will continue with system simulation and i/o performance testing. We will prepare DVCS data file which can be used in simulation process. In about one month we'll make a final decision on hardware and order it. Preliminary, if current design will be used, we'll need following boards (with spares): v1495 (6 units), A395A (11 units), A395D (2 units). We may be able to borrow v1495 from other JLAB groups to speedup developing.

Projects

• PCAL (works, +5V fixed, signal distr board replaced, 1 sec delay introduced in 'go' to fix hunging; Stepan asked about

10times better ADC resolution - >2Gsample card ???)

• TI in PCI - may need it again, remind Ed

• Active collimator needed in DAQ - probably

• Wolfram (works, ROOT too slow and will be addressed during upcoming run preparations (select function, control worls bit by EB ???))

• Lecroy repairs, sy527 AC connectors replacement (will Chris)

• PrPMC880 replacement

• Frost preparations: all power turned on including DC FASTBUS crates, ethernet/serial cables ran for target platform;

Carl still working on ET modifications, tests to be started dayli, new version expected in about a week, we'll wait, do modifications and then run full CLAS DAQ test; new EPICS channels from target

TODO:

• sy1527: reboot button, reconnect after hardware reboot

• sy527 support (similar to sy1527 but in VME crate because of VME CAENAT board v288)

• v1190/v1290 extensive testing (CBLT, slot#, install mv6100 in the hall and switch to 2eSST)

• DVCS Trigger Development

• Hall B electronics inventarization

• Upcoming run preparations on requests (fix flip-related problem in online delay reporting correction procedure, ..)

• beam test with preshower during upcoming run - will talk next week Stepan

• probably Hall D test in Hall B - next summer