JLAB FADC250: Difference between revisions
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[https://clonwiki.jlab.org/wiki/clondocs/Docs/JLAB_FADC250_V2_ADC_FPGA_V5.pdf FPGA (pdf)] | [https://clonwiki.jlab.org/wiki/clondocs/Docs/JLAB_FADC250_V2_ADC_FPGA_V5.pdf FPGA (pdf)] | ||
[https://clonwiki.jlab.org/wiki/clondocs/Docs/JLAB_FADC_Signal_Control_Module.pdf Signal Control Module (pdf)] | |||
Some documentation for V1 FADC: | |||
[https://clonwiki.jlab.org/wiki/clondocs/Docs/JLAB_FADC_DataFormat_v1.pdf V1 data format (pdf)] | [https://clonwiki.jlab.org/wiki/clondocs/Docs/JLAB_FADC_DataFormat_v1.pdf V1 data format (pdf)] | ||
[https://clonwiki.jlab.org/wiki/clondocs/Docs/JLAB_FADC_Prog_v7.pdf Old FADC Programming ((pdf)] | [https://clonwiki.jlab.org/wiki/clondocs/Docs/JLAB_FADC_Prog_v7.pdf Old FADC Programming ((pdf)] | ||
Revision as of 09:43, 15 September 2011
Preliminary documentation:
Sep 1, 2011 registers description in Programming (pdf)
Some documentation received on Sep 12, 2011 from Bryan Moffit:
Some documentation for V1 FADC: