September 24, 2008 online meeting minutes: Difference between revisions
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present: Sergey Boyarinov, Ben Raydo, Valery Kubarovsky, Chris Cuevas, Puneet Khetarpal, Pawel Nadel-Turonsky | present: Sergey Boyarinov, Ben Raydo, Valery Kubarovsky, Chris Cuevas, Puneet Khetarpal, Pawel Nadel-Turonsky, Sergey Pozdnyakov | ||
* dvcs trigger | * dvcs trigger | ||
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all discriminators output width set to 40ns, some cables were fixed, all scalers in DVCSTRIG GUI counts the same (by quadrons, will be fixed) | all discriminators output width set to 40ns, some cables were fixed, all scalers in DVCSTRIG GUI counts the same (by quadrons, will be fixed) | ||
preliminary signal propagation measurements were conducted Friday, results were not quite consistent (+-100ns); based on results new 34-pair cable installed between DVCSTRIG and CLASTRIG2, signal from SF pulser was sent by 2 routs: through ADC coax cable and through DVCSTRIG-CLASTRIG2 trigger systems and up to the FASTBUS crate gate logic, difference observed is about 20ns; that number will be 25ns smaller after forward carrage will be moved to the nominal position (we measured about 6ns/meter for the 34-pair cable); we need to speed up gate about 40-50 ns more based on those results; another option is to use fast coaxial cable instead of 34-pair one, we can send 2 decisions from DVCSTRIG over 2 cables using 2 built-in outputs on v1495, then we do not need converters; ethernet-connected scope is installed to monitor trigger timing remotely; we'll measure every component's timing again more carefully | preliminary signal propagation measurements were conducted Friday, results were not quite consistent (+-100ns); based on results new 34-pair cable installed between DVCSTRIG and CLASTRIG2, signal from SF pulser was sent by 2 routs: through ADC coax cable and through DVCSTRIG-CLASTRIG2 trigger systems and up to the FASTBUS crate gate logic, difference observed is about 20ns; that number will be 25ns smaller after forward carrage will be moved to the nominal position (we measured about 6ns/meter for the 34-pair cable); we need to speed up gate about 40-50 ns more based on those results; another option is to use fast coaxial cable instead of 34-pair one, we can send 2 decisions from DVCSTRIG over 2 cables using 2 built-in outputs on v1495, then we do not need converters; ethernet-connected scope is installed to monitor trigger timing remotely; we'll measure every component's timing again more carefully; order coax cable !!! | ||
software: both DVCSTRIG and CLASTRIG2 GUIs are operational, more tests will be performed; | software: both DVCSTRIG and CLASTRIG2 GUIs are operational, more tests will be performed; | ||
other activity discussed on previous meeting still to me conducted: scripts and EPICS TO BE ADJUSTED; need some trigger logic test; need to make sure everybody have the same map, ADC and TDC and trigger; Pawel will prepare lookuptable procedures; Hovanes may need to modify EPICS GUIs, Sergey B. need to fix EPICS stuff | other activity discussed on previous meeting still to me conducted: scripts and EPICS TO BE ADJUSTED, Ben provide docs/header files etc; need some trigger logic test; need to make sure everybody have the same map, ADC and TDC and trigger (Ben is working on it); Pawel will prepare lookuptable procedures; Hovanes may need to modify EPICS GUIs, Sergey B. need to fix EPICS stuff | ||
Latest revision as of 09:38, 24 September 2008
present: Sergey Boyarinov, Ben Raydo, Valery Kubarovsky, Chris Cuevas, Puneet Khetarpal, Pawel Nadel-Turonsky, Sergey Pozdnyakov
- dvcs trigger
racks are installed in final destination, clean AC power installation in progress
all discriminators output width set to 40ns, some cables were fixed, all scalers in DVCSTRIG GUI counts the same (by quadrons, will be fixed)
preliminary signal propagation measurements were conducted Friday, results were not quite consistent (+-100ns); based on results new 34-pair cable installed between DVCSTRIG and CLASTRIG2, signal from SF pulser was sent by 2 routs: through ADC coax cable and through DVCSTRIG-CLASTRIG2 trigger systems and up to the FASTBUS crate gate logic, difference observed is about 20ns; that number will be 25ns smaller after forward carrage will be moved to the nominal position (we measured about 6ns/meter for the 34-pair cable); we need to speed up gate about 40-50 ns more based on those results; another option is to use fast coaxial cable instead of 34-pair one, we can send 2 decisions from DVCSTRIG over 2 cables using 2 built-in outputs on v1495, then we do not need converters; ethernet-connected scope is installed to monitor trigger timing remotely; we'll measure every component's timing again more carefully; order coax cable !!!
software: both DVCSTRIG and CLASTRIG2 GUIs are operational, more tests will be performed;
other activity discussed on previous meeting still to me conducted: scripts and EPICS TO BE ADJUSTED, Ben provide docs/header files etc; need some trigger logic test; need to make sure everybody have the same map, ADC and TDC and trigger (Ben is working on it); Pawel will prepare lookuptable procedures; Hovanes may need to modify EPICS GUIs, Sergey B. need to fix EPICS stuff