September 19, 2018 online meeting minutes - Revision history

Boiarino at 21:13, 19 September 2018

2018-09-19T21:13:42Z

← Older revision		Revision as of 17:13, 19 September 2018
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	present: Sergey Boyarinov, Eugene, Gagik, Nathan, Ben, Rafo, Stepan, Ed, vpk		present: Sergey Boyarinov, Eugene, Gagik, Nathan, Ben, Rafo, Stepan, Ed, vpk, francesco (by bluejeans)

	* FADC/MM packing and decoding: FADC packing is implemented completely, including offline decoder and monitoring tools; data were taken in verification mode and both packed and unpacked banks are identical, final check will be during the run, we have to think how to verify two options consistency offline, for example Gagik can make comparison as separate program; Micromega packing is installed and data were taken, micromega team is checking consistency, Gagik will send ~~Franchesko~~ FADC decoder as example		* FADC/MM packing and decoding: FADC packing is implemented completely, including offline decoder and monitoring tools; data were taken in verification mode and both packed and unpacked banks are identical, final check will be during the run, we have to think how to verify two options consistency offline, for example Gagik can make comparison as separate program; Micromega packing is installed and data were taken, micromega team is checking consistency, Gagik will send Francesko FADC decoder as example; Francesco was able to compile decoder and process new format string using jevio6.1, he will develop decoder using eclipse and later it will be incorporated into main repository after kevin issues resolved

	* new RF board: MO (Master Oscillator) board was installed in scaler1 crate slot 20, library from Bryan Moffit installed and included into readout list, will take data and check if it works as it suppose to; signals on scope looks much better then from old board, and we can control rescale now; board has 5 outputs so one more idc or fadc channel can be used to record RF information; will try to set prescale 32		* new RF board: MO (Master Oscillator) board was installed in scaler1 crate slot 20, library from Bryan Moffit installed and included into readout list, will take data and check if it works as it suppose to; signals on scope looks much better then from old board, and we can control rescale now; board has 5 outputs so one more idc or fadc channel can be used to record RF information; will try to set prescale 32

Boiarino at 15:00, 19 September 2018

2018-09-19T15:00:33Z

← Older revision		Revision as of 11:00, 19 September 2018
Line 1:		Line 1:
	present: Sergey Boyarinov,		present: Sergey Boyarinov, Eugene, Gagik, Nathan, Ben, Rafo, Stepan, Ed, vpk

	* FADC/MM packing and decoding: FADC packing is implemented completely, including offline decoder and monitoring tools; data were taken in verification mode and both packed and unpacked banks are identical; Micromega packing is installed and data were taken, micromega team is checking consistency		* FADC/MM packing and decoding: FADC packing is implemented completely, including offline decoder and monitoring tools; data were taken in verification mode and both packed and unpacked banks are identical, final check will be during the run, we have to think how to verify two options consistency offline, for example Gagik can make comparison as separate program; Micromega packing is installed and data were taken, micromega team is checking consistency, Gagik will send Franchesko FADC decoder as example

	* new RF board: MO (Master Oscillator) board was installed in scaler1 crate slot 20, library from Bryan Moffit installed and included into readout list, will take data and check if it works as it suppose to; signals on scope looks much better then from old board, and we can control rescale now; board has 5 outputs so one more idc or fadc channel can be used to record RF information		* new RF board: MO (Master Oscillator) board was installed in scaler1 crate slot 20, library from Bryan Moffit installed and included into readout list, will take data and check if it works as it suppose to; signals on scope looks much better then from old board, and we can control rescale now; board has 5 outputs so one more idc or fadc channel can be used to record RF information; will try to set prescale 32

	* Trigger validation:		* Trigger validation: solenoid cannot be turned on, we'll turn on torus and take data; Ben finished simulator, Ben ran spring data and gave Rafo evio file after simulation with trigger banks for checking; Sergey finished coding C++ simulation code, debugging; Raffaella and Veronique are working on dictionary generation, when done will update our road generator program

	* activemq broker: 'standard' configuration lead to memory usage increased up to max=4G during about a week, after that cpu usage came up from 8% to 38% and few second delays were observed in messages delivery; Sergey modified config using advices found in google (G1 garbage collector was activated) and now memory usage have regular fluctuations between 0.5G and 1G with 10-12min period, will run like this and see how it behaved in long term		* activemq broker: 'standard' configuration lead to memory usage increased up to max=4G during about a week, after that cpu usage came up from 8% to 38% and few second delays were observed in messages delivery; Sergey modified config using advices found in google (G1 garbage collector was activated) and now memory usage have regular fluctuations between 0.5G and 1G with 10-12min period, will run like this and see how it behaved in long term

			* Stepan: HTCC efficiency have to be rechecked regarding possible trigger inefficiency in mingle plane for large theta (>25 degrees), he will send more information, Sergey will make sure we have HTCC bank for CTOF/HTCC in HLS code, can rerun existing data for events without HTCC in trigger if we have some

Boiarino at 13:38, 19 September 2018

2018-09-19T13:38:43Z

← Older revision		Revision as of 09:38, 19 September 2018
Line 1:		Line 1:
	present: Sergey Boyarinov,		present: Sergey Boyarinov,

	~~Clas On-line Meeting~~, ~~Wednesday~~, ~~September 19 at 10am in Room A110~~		* FADC/MM packing and decoding: FADC packing is implemented completely, including offline decoder and monitoring tools; data were taken in verification mode and both packed and unpacked banks are identical; Micromega packing is installed and data were taken, micromega team is checking consistency

	* FADC/MM packing and decoding:		* new RF board: MO (Master Oscillator) board was installed in scaler1 crate slot 20, library from Bryan Moffit installed and included into readout list, will take data and check if it works as it suppose to; signals on scope looks much better then from old board, and we can control rescale now; board has 5 outputs so one more idc or fadc channel can be used to record RF information

	* new RF board:

	* Trigger validation:		* Trigger validation:

	* activemq broker: 'standard' configuration lead to memory usage increased up to max=4G during about a week, after that cpu usage came up from 8% to 38% and few second delays were observed in messages delivery; Sergey modified config using advices found in google (G1 garbage collector was activated) and now memory usage have regular fluctuations between 0.5G and 1G with 10-12min period, will run like this and see how it behaved in long term		* activemq broker: 'standard' configuration lead to memory usage increased up to max=4G during about a week, after that cpu usage came up from 8% to 38% and few second delays were observed in messages delivery; Sergey modified config using advices found in google (G1 garbage collector was activated) and now memory usage have regular fluctuations between 0.5G and 1G with 10-12min period, will run like this and see how it behaved in long term

Boiarino: Created page with "present: Sergey Boyarinov, Clas On-line Meeting, Wednesday, September 19 at 10am in Room A110 * FADC/MM packing and decoding: * new RF board: * Trigger validation: *..."

2018-09-19T13:33:32Z

Created page with "present: Sergey Boyarinov, Clas On-line Meeting, Wednesday, September 19 at 10am in Room A110 * FADC/MM packing and decoding: * new RF board: * Trigger validation: *..."

New page

present: Sergey Boyarinov,

Clas On-line Meeting, Wednesday, September 19 at 10am in Room A110

* FADC/MM packing and decoding:

* new RF board:

* Trigger validation:

* activemq broker: 'standard' configuration lead to memory usage increased up to max=4G during about a week, after that cpu usage came up from 8% to 38% and few second delays were observed in messages delivery; Sergey modified config using advices found in google (G1 garbage collector was activated) and now memory usage have regular fluctuations between 0.5G and 1G with 10-12min period, will run like this and see how it behaved in long term