Random Signal Source (RSS) Module Set-up
   Prototype Version
   Module # 2 
   With VME Flex I/O Programming

 Fernando J. Barbosa
 15 October 2002


   This prototype RSS module contains two completely independent
 signal sources or channels (A and B). Each of the channels has
 an external sync input (EXT IN), a NIM sync output (SYNC OUT)
 and a differential ECL output (ECL OUT) and a NIM output (NIM OUT)
 for the random signal source, all available on the front panel
 of the module.
   The EXT IN input has been configured to accept NIM pulses from
 an external pulse generator. This input can easily be set to accept
 a variety of pulses, including ECL, TTL or analog. No signals should
 be connected to this input while using the internal sync source.
   The SYNC OUT outputs NIM pulses replicated from the selected sync
 source, external or internal. The frequency of the internal sync
 source and selection of sync sources are effected through the VME
 interface using two 16-bit registers in the Flex I/O interface for
 channels A and B.
   The NIM OUT and ECL OUT output random pulses with average rates
 dependent on the frequency of the sync source and have a Poisson
 distribution in time.

    EXT IN     Input from external pulser, NIM, Lemo connector.
    SYNC OUT   Output from external or internal sync, NIM, Lemo connector.
    ECL OUT    Differential random source, ECL w/ ground, header connector.
    NIM OUT    Output random source, NIM, Lemo connector.

    Each of the 16-bit data words for sources A and B are defined as follows:

    D15 = Hi frequency range (0=Selected, 1= Not Selected)
    D14 = Mid frequency range (0=Selected, 1=Not Selected)
    D13 = Low frequency range (0=Selected, 1=Not Selected)

    D12 = Source Selection (0=Internal Sync, 1=External Sync)

    D11, D10 = 0

    D9 - D0 = Internal Sync Frequency

 Note: A 12-bit DAC is used to set the frequency of the internal
 Sync source. However, due to an error in layout, bits 8 and 9 are
 set to zero. Bits D9 and D8 from the VME registers are connected
 to bits 11 and 10 of the DAC and bits D7 through D0 are connected
 to bits 7 through 0 of the DAC. This creates a  hole  in the
 frequency range corresponding to bits 8 and 9 on the DAC. This
 problem will be corrected on the final version of the module.



   The following frequency measurements are to be used as a guide
 when using the internal SYNC source. The average rate out of the
 random source is similar to the output rate of the SYNC source.
 Verification can be performed real-time with the output signals
 from SYNC OUT buffered to VME scalers or to time interval timers.


    16-bit Register     Frequency (Hz) +/- 10%
    Word (Hex)          Source A (Port1)


    C000 (Min)            2    Low Range
    C075                 20
    C117                150
    C339                400

    A000                200    Mid Range
    A017                500
    A03d                 1 K
    A08A                 2 K
    A0d8                 3 K
    A0ff                3.5 K
    A100                12 K
    A1e5                15 K
    A392                33 K

    6000                 16 K  High Range
    6004                 20 K
    600d                 30 K
    6016                 40 K
    601f                 50 K
    6028                 60 K
    6031                 70 K
    603b                 80 K
    6044                 90 K
    604d                100 K
    607a                150 K
    60a9                200 K