Level 1, Stage 2: Peak Finding Unit (N inputs from FADCs)
16Kx32
(12 in,
20 out)
4
4
4
10
10
16Kx32
(14 in,
20 out)
reg
reg
4
4
16Kx32
(14 in,
 20 out)
10
10
10
req
reg
switch
10
10
10
4
4
4
10
switch
16Kx32
(14 in,
20 out)
reg
reg
reg
req
4
4
4
4
ииииииии.ииииииии.
4
4bit ADC
10
10
incomplete
peak: 4bit ADC,
6bit length
completed
peak: 4bit ADC,
6bit center
10
10
10
10
10
reg
4x
N
reg
reg
reg
reg
reg
4
10
10
4
4
comp
10
10
reg
reg
4
4
reg
reg
reg
4
10
4
reg
10
comp
reg
reg
10
10
4
4
reg
reg
10
4
reg
10
reg
10
10
10
reg
reg
reg
10
comp
4
4