CLONWiki - User contributions [en]

JLAB TI

2009-09-17T15:44:59Z

129.57.86.11:

Manual for TI board in PCI format in [https://clonwiki.jlab.org/wiki/clondocs/Docs/JLAB_PCI_PCITI_board_RevC.pdf (pdf)]

CLON Index

2009-09-17T15:43:27Z

129.57.86.11:

[[Apache]]

[[automounts]]

[[Bootp]]

[[Cacti]]

[[CAEN A464]] caenet board (installed in sy527 mainframes)

[[CAEN SY1527 Mainframe]]

[[CAEN SY527 Mainframe]] and modules

[[CAEN V1190]] TDC board (128 ch 100 ps)

[[CAEN V1290]] TDC board (32 ch 25 ps)

[[CAEN V1495]] General Purpose VME Board

[[CAEN V288]]

[[CAEN V775]] TDC Board

[[CAEN V895]] 16 ch. Leading Edge Discriminator with individual thresholds

[[Capfast]]

[[Cisco Switches]]

[[Clasweb]]

[[Clasxt]]

[[Clon00]]

[[Clon01]]

[[Clon02]]

[[Clon03]]

[[Clon04]]

[[Clon05]]

[[Clon06]]

[[Clon10]]

[[Clon20]]

[[Clondaq1]]

[[Clondaq2]]

[[Clondb1]]

[[Clonfs]] Main RAID System

[[Clonfs1]]

[[Clonfs2]]

[[Clonmon]]

[[Clonmon1]]

[[Clonpc1]]

[[Clonpc2]]

[[Clonweb]]

[[Clonwiki]]

[[clonhp]]

[[clonhp2]]

[[Coda]]

[[Compcontrol CC121]]

[[CycladesTS1000]]

[[DATEL DVME-628]]

[[DNS server]]

[[Electronics Documentation]]

[[EtherLite32]]

[[EPICS Base Installation]]

[[EPICS: Generation of IOC with different options and customization for HallB]]

[[EPICS: Software IOC]]

[[EPICS: vxWorks IOC]]

[[EPICS: Software IOC for CAEN HV]]

[[EPICS: generation of DBs and GUIs for HV]]

[[EPICS: CVS usage examples]]

[[EPICS: Timeline Histories]]

[[EPICS: Gamma Profiler]]

[[Event Monitor]]

[[Fiber Channel Switches]]

[[FieldPoint]]

[[Foundry BigIron 15000 Switch]]

[[Foundry Switches]]

[[HYTEC VSD2992]]

[[JAVA installation]]

[[JLAB Discriminators]]

[[JLAB LF]] VME Latch FIFO Board

[[JLAB LD]] VME Latch Driver Board

[[JLAB MLU]] VME Memory Lookup Unit (MLU)

[[JLAB OR]] VME Programmable “OR” Module

[[JLAB TS2]] VXI D-size Trigger Supervisor Module

[[JLAB TI]] Trigger Interface Module

[[Joerger VSC16]]

[[KineticSystems 2917]]

[[Labeling Machines]]

[[Linux Installation Procedure]]

[[Linux Customization on CLON Cluster]]

[[Lnf cluster]]

[[Mac OS X Installation Procedure]]

[[Motorola MVME5500]]

[[MRTG]]

[[mSQL]]

[[MySQL Installation]]

[[MySQL Usage]]

[[Nagios]]

[[Nagios Plugins]]

[[Net-SNMP]]

[[NFS]]

[[NIS server]]

[[Nrpe]]

[[Ntp]]

[[OMS VME44]] by Oregon Micro Systems

[[OMS VS4]] by Oregon Micro Systems

[[OpenSSL]]

[[PERL]]

[[Procmail]]

[[PrPMC]]

[[raidold]]

[[Routing]]

[[Rrdtool]]

[[SBS VIPC616]]

[[Serial Connections from Computer Ports]]

[[Sfs61]]

[[Slow Controls Time History]]

[[SmartSockets]]

[[SNMP]]

[[Software Documentation]]

[[Solaris Installation Procedure]]

[[Solaris Customization on CLON Cluster]]

[[Solaris Patches]]

[[SSH]]

[[Struck SIS3801]]

[[Sudo]]

[[SUN Microsystems]]

[[SYSTRAN VMESC5]]

[[Tcl/Tk]]

[[Tftp]]

[[JLAB FLEXIO]]

[[Troubleshooting printing]]

[[UNIX Automount on CLON Cluster]]

[[UPS (Uninterruptible Power Supplies)]]

[[UPS CHB1]]

[[UPS CHB2]]

[[UPS Troubleshooting]]

[[VI editor]]

[[VMIC VMIVME-3122]]

[[VMIC VMIVME-2120]]

[[VMIC VMIVME-1129]]

[[VMIC VMIVME-2232]]

[[VMIC VMIVME-6015]]

[[VMIC VMIVME-6016]]

[[VNC]]

[[WIENER]]

[[Wiki]]

[[Wiring]]

[[X server]]

[[Xycom DIO XVME-240]]

[[Xycom XVME-564]]

[[Xycom XVME-560]]

[[ZFS]]

BONUS Readout

2009-09-16T20:47:02Z

129.57.86.11: /* connections */

This page contains information related to the BONUS TPC chamber readout system.

== History ==

From: Stephen Bueltmann <sbueltma@odu.edu> 11/30/07 14:48
Subject: Fwd: RORC and DDL Information
To:
Sergey Boyarinov <boiarino@jlab.org>, David Abbott <abbottd@jlab.org>,
Stepan Stepanyan <stepanya@jlab.org>, Howard Fenker <hcf@jlab.org>, hafidi@jlab.org
Hello All,
I am attaching a reply I received from the Hungarian company manufacturing the
ALICE (not the TPC) side of the electronics.
As per their web site (http://www.cerntech.hu) the price for the
PCI-X RORC is 1540 Euro and for one
SIU card 615 Euro.
The total would be 2770 Euro for a complete readout w/o RCU and w/o spares.
There seem to be special prices for CERN collaborating institutions.
Wrote to Luciano about the RCU boards but have not heard back.
Cheers,
Stephen
Begin forwarded message:
From: "Kiss Tivadar" <tivadar.kiss@cerntech.hu>
Date: November 30, 2007 2:35:36 PM EST
To: "'Stephen Bueltmann'" <sbueltma@odu.edu>
Subject: RE: RORC and DDL Information
Dear Stephen,
We are pleased to receive your inquiry for DDL hardware. Of course it is possible for you to get such boards from our company. Delivery time would be cca. 1-3
monthes after receiving an order, depending on the quantity. (We have usually only a few cards on stock.)
The DIU (Destination Interface Unit) of a DDL link is now integrated on the RORC (Read-out Receiver Card). A single RORC (that is 100 MHz, 64-bit
PCI-X interaface card) has two DIUs integrated on it. Thus, for two DDL links (that is, to read out two ALICE RCUs) you need 2 SIU cards and 1 RORC card.
Please let me know how many quantities you are interested in, and what is a delivery schedule that would fit to your needs.
Best regards,
Tivadar Kiss
Cerntech Ltd.
Ulloi ut 31.
H-1091 Budapest
Hungary
tel: +36 1 216 8219)
fax: +36 20 919 5132
From: Stephen Bueltmann [mailto:sbueltma@odu.edu]
Sent: Thursday, November 29, 2007 4:05 PM
To: info@cerntech.hu
Subject: RORC and DDL Information
Hello,
I am involved with the experimental programme at Jefferson Lab
in the US. One of the experiments is using a TPC which we are
reading out with the ALICE TPC front end cards FECs and their
USB readout controller (U2F).
We are considering to change to the standard ALICE readout controller
(RCU) used by the ALICE TPC.
This would require to purchase also the RORC and DDL hardware.
Would it be possible and how long would it take to get one RORC, one
SIU and one DIU card from you?
Thanks in advance and
Cheers,
Stephen
---------------------------------------------------------------------
Stephen Bueltmann
Old Dominion University
At ODU: Physics Department
4600 Elkhorn Avenue
Norfolk, VA 23529, USA
Telephone (757) 683-6401
Facsimile (757) 683-5809
sbueltma@odu.edu
----------------------------------------------------------------------
---------------------------------------------------------------------
Stephen Bueltmann
Old Dominion University
At ODU: Physics Department
4600 Elkhorn Avenue
Norfolk, VA 23529, USA
Telephone (757) 683-6401
Facsimile (757) 683-5809
sbueltma@odu.edu

== Sep 2009 NOTES for the system operations ==

* firmware loading:
from croctest5: ssh root@10.1.3.241 (bottm crate, top has .236), pass is 'dcs'
cd /eg6
./program rcu_170809.bit

* documentation

http://www.ge.infn.it/~minutoli/BONUS/SW/

http://www.jlab.org/~devita/eg6/

* event size (spars off, 200 threshold - no noise): 68+4+128+Nfecs

* expected rate about 1.3kHz

== connections ==

* every crates is connected to 4 power supplies, one 4.0V and 3 3.3V

* several crates can be connected to the same power supplies

* + or - labels must be ignored, rad cable always goes to plus

* ethernets from crates goes to switch, switch is connected to the eth1 of the host machine; those connections will be used to load firmware; to get IP address crates must be off, use 'tail -f /var/log/messages' and turn crate on, message will be issued containing
IP address; first 2 crates: 10.1.3.241 (with cards), 10.1.3.236 (empty)

* fibers goes from crates to RORCs; to see if RORCs are configured by Linux, use ''/date/rorc/Linux/rorc_find''; to check connection use http://www.jlab.org/~devita/eg6/eg6_electronics.pdf

BONUS Readout

2009-09-16T20:44:57Z

129.57.86.11: /* connections */

BONUS Readout

2009-09-16T20:42:12Z

129.57.86.11: /* connections */

BONUS Readout

2009-09-16T20:34:00Z

129.57.86.11: /* Sep 2009 NOTES for the system operations */