CLONWiki - User contributions [en]

December 2, 2009 online meeting minutes

2009-12-02T16:03:12Z

129.57.83.13:

present: Sergey, Sergey, Chris, Ben, Pawel

1. Collider chips: no L1 input, must be done at VME board

for CLAS12 and EIC (1.5GHz crossings) have to use regular trigger approach

December 2, 2009 online meeting minutes

2009-12-02T16:03:04Z

129.57.83.13:

present: Sergey, Sergey, Chris, Ben, Pawel

1. Collider chips: no L1 input, must be done at VME board
for CLAS12 and EIC (1.5GHz crossings) have to use regular trigger approach

CLON Group Meetings

2009-12-02T15:12:44Z

129.57.83.13: /* 2009 */

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== 2009 ==

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November 11, 2009 online meeting minutes

2009-11-11T16:08:20Z

129.57.83.13:

present: Sergey Boyarinov, Sergey Pozdnyakov, Ben Raydo

1. JLAB discriminator board prototype was tested by Sergey P., latest test was with triangle pulse, all results obtained with rectangular pulse were confirmed, although threshold slope changed slightly: 0.235 (triangle) and 0.263(rectangular), Ben will check it, it must be exactly 0.25. Passive splitters were used.
Temperature test still to be done. Board will go to Ben for more tests and changes as we discussed September 30. When ready, will order 5 boards.
If Sergey Kuleshov's people will be involved in testing and production, we'd recommend to produce test board to run tests automatically. We will discuss it by email and personally when people from that group will be here next year.

2. eg6 run reached production stage after about month of commissioning, number of DAQ problems were resolved. Main problem was related to the pipeline regime in TPC readout, it was fixed by CERN/ALICE personal due to Raffaella DeVita efforts. New DAQ software was tested in CLAS and some problems were observed, will be debugged.

November 11, 2009 online meeting minutes

2009-11-11T15:30:23Z

129.57.83.13:

November 11, 2009 online meeting minutes

2009-11-11T15:26:37Z

129.57.83.13:

present: Sergey Boyarinov, Sergey Pozdnyakov, Ben Raydo

1. JLAB discriminator board prototype was tested by Sergey P., latest test was with triangle pulse, all results obtained with rectangular pulse were confirmed, although threshold slope changed slightly: 0.235 (triangle) and 0.263(rectangular), Ben will check it, it must be exactly 0.25. Passive splitters were used.
Temperature test still to be done. Board will go to Ben for more tests and changes as we discussed September 30. When ready, will order 5 boards.
If Sergey Kuleshov's people will be involved in testing and production, we'd recommend to produce test board to run tests automatically. Will discuss it when people from that group will be here next year.

2. eg6 run reached production stage after about month of commissioning, number of DAQ problems were resolved. Main problem was related to the pipeline regime in TPC readout, it was fixed by CERN/ALICE personal due to Raffaella DeVita efforts.

November 11, 2009 online meeting minutes

2009-11-11T15:25:33Z

129.57.83.13:

present: Sergey Boyarinov, Sergey Pozdnyakov, Ben Raydo

1. JLAB discriminator board prototype was tested by Sergey P., latest test was with triangle pulse, all results obtained with rectangular pulse were confirmed, although threshold slope changed slightly: 0.235 (triangle) and 0.263(rectangular), Ben will check it, it must be exactly 0.25. Passive splitters were used.
Temperature test still to be done. Board will go to Ben for more tests and changes. When ready, will order 5 boards.
If Sergey Kuleshov's people will be involved in testing and production, we'd recommend to produce test board to run tests automatically. Will discuss it when people from that group will be here next year.

2. eg6 run reached production stage after about month of commissioning, number of DAQ problems were resolved. Main problem was related to the pipeline regime in TPC readout, it was fixed by CERN/ALICE personal due to Raffaella DeVita efforts.

November 11, 2009 online meeting minutes

2009-11-11T15:25:05Z

129.57.83.13:

present: Sergey Boyarinov, Sergey Pozdnyakov, Ben Raydo

1. JLAB discriminator board prototype was tested by Sergey P., latest test was with triangle pulse, all results obtained with rectangular pulse were confirmed, although threshold slope changed slightly: 0.235 (triangle) and 0.263(rectangular), Ben will check it, it must be exactly 0.25. Passive splitters were used.
Temperature test still to be done. Board will go to Ben for more tests and changes. When ready, will order 5 boards.
If Sergey Kuleshov's people will be involved in testing and production, we'd recomment to produce test board to run tests automatically. Will discuss it when people from that group will be here next year.

2. eg6 run reached production stage after about month of commissioning, number of DAQ problems were resolved. Main problem was related to the pipeline regime in TPC readout, it was fixed by CERN/ALICE personal due to Raffaella DeVita efforts.

November 11, 2009 online meeting minutes

2009-11-11T15:24:52Z

129.57.83.13:

present: Sergey Boyarinov, Sergey Pozdnyakov, Ben Raydo

1. JLAB discriminator board prototype was tested by Sergey P., latest test was with triangle pulse, all results obtained with rectangular pulse were confirmed, although threshold slope changed slightly: 0.235 (triangle) and 0.263(rectangular), Ben will check it, it must be exactly 0.25. Passive splitters were used.
Temperature test still to be done. Board will go to Ben for more tests and changes. When ready, will order 5 boards.
If Sergey Kuleshov's people will be involved in testing and production, we'd recomment to produce test board to run tests automatically. Will discuss it when people from that group will be here next year.

2. eg6 run reached production stage after about month of commissioning, number of DAQ problems were resolved. Main problem was related to the pipeline regime in TPC readout, it was fixed by CERN/ALICE personal due to Raffaella DeVita efforts.

November 11, 2009 online meeting minutes

2009-11-11T15:16:56Z

129.57.83.13:

CLON meeting November 11, 2009

2009-11-11T14:50:25Z

129.57.83.13:

Clas On-line Meeting, Wednesday, November 11 at 10am in Room L104 - room change !!!
------------------------------------------------------------------

1. JLAB discriminator testing results

2. eg6 run status

CLON Group Meetings

2009-11-11T14:48:40Z

129.57.83.13:

October 14, 2009 online meeting minutes

2009-10-14T14:42:14Z

129.57.83.13:

present: Sergey Boyarinov, Chris Cuevas, Sergey Pozdnyakov, Ben Raydo

1. TPC

2. JLAB discr tests

- shift is small but exist

- run pulser directly to second tdc connector

- use 50om fanout instead of active one

- repeat with another tdc board

October 14, 2009 online meeting minutes

2009-10-14T14:41:35Z

129.57.83.13:

CLON meeting October 14, 2009

2009-10-14T13:12:33Z

129.57.83.13:

Clas On-line Meeting, Wednesday, October 14 at 10am in Room A110
------------------------------------------------------------------

1. JLAB discriminator testing

2. TPC readout status

CLON Group Meetings

2009-10-14T13:11:41Z

129.57.83.13: /* 2009 */

September 30, 2009 online meeting minutes

2009-09-30T16:02:17Z

129.57.83.13:

present: Sergey Boyarinov, S.P., Ben

1. Discr:

* compensate for propagation if possible

* test with different TDC boards and low amplitude pulse, probably triangle shape

* investigate spikes in trigger output distributions (change input frequency etc)

* threshold dependence is very linear for one channel, need to check channel-to-channel dependence, typical must be +-1mv (spec has +-3mv max); slope measured as 0.263, must be 0.25 (maybe scope is not calibrated good enough, Ben will check)

* tdc output pulse width: need to have a calibration on board level to make sure it starts from zero and linear

* trg output width will have 4ns step

* delay for trg is 75-80ns, need as low as possible, will be 15ns in new revision with 4ns step

* OR output works, masks works

* test input to be implemented

* scalers (ungated and gated) to be tested, they resets on read; readout will be the same as JLAB FADCs (DMA readout); gated and ungated scalers must to be latched together - to be implemented

* temperature dependence test to be completed, probably by changing fan speed in VME crate

2. eg6 run

* BONUS electronics: assembling in Hall B under way, will try to make something working tonight; a lot of work to commission electronics and software ...

September 30, 2009 online meeting minutes

2009-09-30T16:00:55Z

129.57.83.13:

September 30, 2009 online meeting minutes

2009-09-30T15:30:53Z

129.57.83.13:

September 30, 2009 online meeting minutes

2009-09-30T15:00:28Z

129.57.83.13:

September 30, 2009 online meeting minutes

2009-09-30T14:54:35Z

129.57.83.13:

September 30, 2009 online meeting minutes

2009-09-30T14:49:59Z

129.57.83.13:

present: Sergey Boyarinov S.P., Ben

1. Discr:

* compensate for propagation if possible

* test with different TDC boards and low amplitude pulse, probably triangle shape

* investigate spikes in trigger output distributions (change input frequency etc)

* threshold dependence is very linear for one channel, need to check channel-to-channel dependence, typical must be +-1mv (spec has +-3mv max); slope measured as 0.263, must be 0.25 (maybe scope is not calibrated good enough, Ben will check)

* tdc output pulse width: need to have a calibration on board level to make sure it starts from zero and linear

* trg output width will have 4ns step

* delay for trg is 75-80ns, need as low as possible, will be 15ns in new revision with 4ns step

* OR output works, masks works

* test input to be implemented

* scalers (ungated and gated) to be tested

September 30, 2009 online meeting minutes

2009-09-30T14:25:52Z

129.57.83.13:

September 30, 2009 online meeting minutes

2009-09-30T14:09:55Z

129.57.83.13:

present: Sergey Boyarinov S.P., Ben

1. Discr:

* compensate for propagation if possible

* test with different TDC boards and low amplitude pulse, probably triangle shape

*

JLAB Discriminators

2009-09-30T13:31:13Z

129.57.83.13:

First version was developed by James Proffitt and is used in tagger system. It was tested by Sergey Pozdnyakov. Results of tests are presented on the next few slides:

* Width distribution ( [https://clonwiki.jlab.org/wiki/clondocs/Docs/JLabDiscr_width_vs_dac.eps eps] [https://clonwiki.jlab.org/wiki/clondocs/Docs/JLabDiscr_width_vs_dac.pdf pdf])

* Threshold distribution ( [https://clonwiki.jlab.org/wiki/clondocs/Docs/JLabDiscr_thresh_vs_dac.eps eps] [https://clonwiki.jlab.org/wiki/clondocs/Docs/JLabDiscr_thresh_vs_dac.pdf pdf])

* Resolution of Leading Edge for JLab Discr. ( [https://clonwiki.jlab.org/wiki/clondocs/Docs/Res_JLabDiscr_Leading_Edge.pdf pdf] [https://clonwiki.jlab.org/wiki/clondocs/Docs/Res_JLabDiscr_Leading_Edge.eps eps])

* Resolution of Leading Edge for LeCroy 2313 Discr. (for compare) ( [https://clonwiki.jlab.org/wiki/clondocs/Docs/Res_2313_Leading_Edge.pdf pdf] [https://clonwiki.jlab.org/wiki/clondocs/Docs/Res_2313_Leading_Edge.eps eps])

* Resolution of Trailing Edge for JLab Discr. ( [https://clonwiki.jlab.org/wiki/clondocs/Docs/Res_JLabDiscr_Trailing_Edge.pdf pdf] [https://clonwiki.jlab.org/wiki/clondocs/Docs/Res_JLabDiscr_Trailing_Edge.eps eps])

Manual in [https://clonwiki.jlab.org/wiki/clondocs/Docs/JLAB_VME_DiscrManual2002.pdf (pdf)]

Following changes were recommended to make that board suitable for CLAS12:

* remove preamplifiers (at least reduce gain): can be done by not-installing some components; different amplifiers can be installed

* mask outputs

* add test input: directly to digital side

* individual channel thresholds, min 10 mV - real

* add second output connector (or high dense connector ?): yes

* different thresholds for output 1 and output 2 (optional; maybe sacrofise individual threshold, maybe groups of 4 etc)

* individual programmable width step: 8ns -> 4ns, the less the better; max=100ns; non-updating mode

* channel-based output delays for trigger output connector - optional, 500ns max

* 32-channel: will try (backplane board ?)

* fast enough: min 150MHz

* internal delay (20 ns is Ok)

* thermodrift - to be studied

* remove monitor

* not-stop scaler readout - optional

* keep gate/veto (2 inputs)

* OR for trigger output (NIM)

* VME readout: write/read all registers, A32/D64 with DMA

As on October 11, 2007 the possibility of board redesign was discussed with Volker, Chris and Stan Majewski, and we are waiting for Stan's final word.

Nov 16, 2007 James responded, asking for details. Sergey responded to Volker and James.

Apr 16, 2008: waiting for management to find money to pay James to do a job.

June 4, 2008: meeting with James and two Sergey's, first discussion on new design and work schedule.

January 28, 2009: CLON meeting with Chris, decided to refresh the project

June 3, 2009: Ben presented first results with 2-channel populated prototype [https://clonwiki.jlab.org/wiki/clondocs/Docs/Discriminator_Prototype_Measurements.pdf (pdf)]. Next step will be to give prototype to Sergey P. for testing, sometime in the end of June.

Sep 30, 2009: Sergey Pozdnyakov completed first tests, pictures:
[https://clonwiki.jlab.org/wiki/clondocs/Docs/dsc2_res_TDC_00_07.pdf TDC output resolution ch0-7],
[https://clonwiki.jlab.org/wiki/clondocs/Docs/dsc2_res_TDC_08_15.pdf TDC output resolution ch8-15], [https://clonwiki.jlab.org/wiki/clondocs/Docs/dsc2_res_TRG_00_07.pdf TRG output resolution ch0-7], [https://clonwiki.jlab.org/wiki/clondocs/Docs/dsc2_res_TRG_08_15.pdf TRG output resolution ch8-15].

JLAB Discriminators

2009-09-30T13:30:01Z

129.57.83.13:

First version was developed by James Proffitt and is used in tagger system. It was tested by Sergey Pozdnyakov. Results of tests are presented on the next few slides:

* Width distribution ( [https://clonwiki.jlab.org/wiki/clondocs/Docs/JLabDiscr_width_vs_dac.eps eps] [https://clonwiki.jlab.org/wiki/clondocs/Docs/JLabDiscr_width_vs_dac.pdf pdf])

* Threshold distribution ( [https://clonwiki.jlab.org/wiki/clondocs/Docs/JLabDiscr_thresh_vs_dac.eps eps] [https://clonwiki.jlab.org/wiki/clondocs/Docs/JLabDiscr_thresh_vs_dac.pdf pdf])

* Resolution of Leading Edge for JLab Discr. ( [https://clonwiki.jlab.org/wiki/clondocs/Docs/Res_JLabDiscr_Leading_Edge.pdf pdf] [https://clonwiki.jlab.org/wiki/clondocs/Docs/Res_JLabDiscr_Leading_Edge.eps eps])

* Resolution of Leading Edge for LeCroy 2313 Discr. (for compare) ( [https://clonwiki.jlab.org/wiki/clondocs/Docs/Res_2313_Leading_Edge.pdf pdf] [https://clonwiki.jlab.org/wiki/clondocs/Docs/Res_2313_Leading_Edge.eps eps])

* Resolution of Trailing Edge for JLab Discr. ( [https://clonwiki.jlab.org/wiki/clondocs/Docs/Res_JLabDiscr_Trailing_Edge.pdf pdf] [https://clonwiki.jlab.org/wiki/clondocs/Docs/Res_JLabDiscr_Trailing_Edge.eps eps])

Manual in [https://clonwiki.jlab.org/wiki/clondocs/Docs/JLAB_VME_DiscrManual2002.pdf (pdf)]

Following changes were recommended to make that board suitable for CLAS12:

* remove preamplifiers (at least reduce gain): can be done by not-installing some components; different amplifiers can be installed

* mask outputs

* add test input: directly to digital side

* individual channel thresholds, min 10 mV - real

* add second output connector (or high dense connector ?): yes

* different thresholds for output 1 and output 2 (optional; maybe sacrofise individual threshold, maybe groups of 4 etc)

* individual programmable width step: 8ns -> 4ns, the less the better; max=100ns; non-updating mode

* channel-based output delays for trigger output connector - optional, 500ns max

* 32-channel: will try (backplane board ?)

* fast enough: min 150MHz

* internal delay (20 ns is Ok)

* thermodrift - to be studied

* remove monitor

* not-stop scaler readout - optional

* keep gate/veto (2 inputs)

* OR for trigger output (NIM)

* VME readout: write/read all registers, A32/D64 with DMA

As on October 11, 2007 the possibility of board redesign was discussed with Volker, Chris and Stan Majewski, and we are waiting for Stan's final word.

Nov 16, 2007 James responded, asking for details. Sergey responded to Volker and James.

Apr 16, 2008: waiting for management to find money to pay James to do a job.

June 4, 2008: meeting with James and two Sergey's, first discussion on new design and work schedule.

January 28, 2009: CLON meeting with Chris, decided to refresh the project

June 3, 2009: Ben presented first results with 2-channel populated prototype [https://clonwiki.jlab.org/wiki/clondocs/Docs/Discriminator_Prototype_Measurements.pdf (pdf)]. Next step will be to give prototype to Sergey P. for testing, sometime in the end of June.

Sep 30, 2009: Sergey Pozdnyakov completed first tests, pictures:
[https://clonwiki.jlab.org/wiki/clondocs/Docs/dsc2_res_TDC_00_07.pdf (TDC output resolution ch0-7)] [https://clonwiki.jlab.org/wiki/clondocs/Docs/dsc2_res_TDC_08_15.pdf (TDC output resolution ch8-15)] [https://clonwiki.jlab.org/wiki/clondocs/Docs/dsc2_res_TRG_00_07.pdf (TRG output resolution ch0-7)] [https://clonwiki.jlab.org/wiki/clondocs/Docs/dsc2_res_TRG_08_15.pdf (TRG output resolution ch8-15)]

JLAB Discriminators

2009-09-30T13:27:51Z

129.57.83.13:

First version was developed by James Proffitt and is used in tagger system. It was tested by Sergey Pozdnyakov. Results of tests are presented on the next few slides:

* Width distribution ( [https://clonwiki.jlab.org/wiki/clondocs/Docs/JLabDiscr_width_vs_dac.eps eps] [https://clonwiki.jlab.org/wiki/clondocs/Docs/JLabDiscr_width_vs_dac.pdf pdf])

* Threshold distribution ( [https://clonwiki.jlab.org/wiki/clondocs/Docs/JLabDiscr_thresh_vs_dac.eps eps] [https://clonwiki.jlab.org/wiki/clondocs/Docs/JLabDiscr_thresh_vs_dac.pdf pdf])

* Resolution of Leading Edge for JLab Discr. ( [https://clonwiki.jlab.org/wiki/clondocs/Docs/Res_JLabDiscr_Leading_Edge.pdf pdf] [https://clonwiki.jlab.org/wiki/clondocs/Docs/Res_JLabDiscr_Leading_Edge.eps eps])

* Resolution of Leading Edge for LeCroy 2313 Discr. (for compare) ( [https://clonwiki.jlab.org/wiki/clondocs/Docs/Res_2313_Leading_Edge.pdf pdf] [https://clonwiki.jlab.org/wiki/clondocs/Docs/Res_2313_Leading_Edge.eps eps])

* Resolution of Trailing Edge for JLab Discr. ( [https://clonwiki.jlab.org/wiki/clondocs/Docs/Res_JLabDiscr_Trailing_Edge.pdf pdf] [https://clonwiki.jlab.org/wiki/clondocs/Docs/Res_JLabDiscr_Trailing_Edge.eps eps])

Manual in [https://clonwiki.jlab.org/wiki/clondocs/Docs/JLAB_VME_DiscrManual2002.pdf (pdf)]

Following changes were recommended to make that board suitable for CLAS12:

* remove preamplifiers (at least reduce gain): can be done by not-installing some components; different amplifiers can be installed

* mask outputs

* add test input: directly to digital side

* individual channel thresholds, min 10 mV - real

* add second output connector (or high dense connector ?): yes

* different thresholds for output 1 and output 2 (optional; maybe sacrofise individual threshold, maybe groups of 4 etc)

* individual programmable width step: 8ns -> 4ns, the less the better; max=100ns; non-updating mode

* channel-based output delays for trigger output connector - optional, 500ns max

* 32-channel: will try (backplane board ?)

* fast enough: min 150MHz

* internal delay (20 ns is Ok)

* thermodrift - to be studied

* remove monitor

* not-stop scaler readout - optional

* keep gate/veto (2 inputs)

* OR for trigger output (NIM)

* VME readout: write/read all registers, A32/D64 with DMA

As on October 11, 2007 the possibility of board redesign was discussed with Volker, Chris and Stan Majewski, and we are waiting for Stan's final word.

Nov 16, 2007 James responded, asking for details. Sergey responded to Volker and James.

Apr 16, 2008: waiting for management to find money to pay James to do a job.

June 4, 2008: meeting with James and two Sergey's, first discussion on new design and work schedule.

January 28, 2009: CLON meeting with Chris, decided to refresh the project

June 3, 2009: Ben presented first results with 2-channel populated prototype [https://clonwiki.jlab.org/wiki/clondocs/Docs/Discriminator_Prototype_Measurements.pdf (pdf)]. Next step will be to give prototype to Sergey P. for testing, sometime in the end of June.

Sep 30, 2009: Sergey Pozdnyakov completed first tests, pictures: [https://clonwiki.jlab.org/wiki/clondocs/Docs/dsc2_res_TDC_00_07.pdf (TDC ch0-7)]

September 30, 2009 online meeting minutes

2009-09-30T13:24:47Z

129.57.83.13:

present: Sergey Boyarinov

CLON meeting September 30, 2009

2009-09-30T13:08:57Z

129.57.83.13:

Clas On-line Meeting, Wednesday, September 30 at 10am in Room A110
------------------------------------------------------------------

1. JLAB discriminator test results

2. Upcoming run preparations

CLON Group Meetings

2009-09-30T13:08:32Z

129.57.83.13: /* 2009 */